This invention relates in general to evaluation of process chambers used for semiconductor manufacturing and, more particularly, to chamber evaluation for purposes of monitoring process drift overtime, or for purposes of comparing two chambers to identify performance differences under equivalent process conditions.
The manufacture of semiconductor devices typically involves process steps which are carried out on silicon wafers in process chambers, one example of which is an etching step. A typical processing chamber used for etching has a housing with a support therein, on which a silicon wafer can be placed. Gases are introduced into the chamber, and flow away from the region of the wafer through openings in a baffle plate. The pressure of the gases in the chamber is monitored at a location on a side of the baffle plate remote from the wafer.
As a series of selective oxide etch procedures are carried out within the chamber, polymer disposition will occur within the chamber over time, and will alter the process conditions within the chamber. For example, polymer deposition will occur within the openings in the baffle plate, thereby reducing the effective size of the openings, which in turn will increase the effective pressure differential between the gases on opposite sides of the baffle plate. Consequently, for a given measured pressure at the pressure sensor below the baffle plate, the actual pressure in the region of the wafer on the opposite side of the baffle plate will progressively increase over time as polymer deposits progressively increase within the openings in the baffle plate.
The progressive increase over time in the gas pressure in the region of the wafer causes a progressive decrease in the effective etch rate of wafers. At some point, the progressive decrease in the effective etch rate reaches a point where insufficient etching of a given wafer will occur, or in other words an etch stop condition will occur, resulting in defective semiconductor parts that must be discarded. As one specific example of this, an integrated circuit might include a dielectric layer, and a particular etch procedure might be intended to etch a via opening down through the dielectric layer to a conductive region immediately beneath the dielectric layer. Subsequent to the etch procedure, a plug of conductive material such as tungsten would be formed in the via opening, in electrical contact with the conductive region. However, as the effective etch rate decreases, it will reach a point where it fails to etch the via opening completely through the dielectric layer. Then, when the conductive plug is subsequently formed, it will not be in electrical contact with the underlying conductive region because there will be dielectric material between the conductive region and the lower end of the plug, as a result of which the particular device may be rendered inoperative.
In order to avoid problems of this type, process chambers are periodically cleaned. The most thorough cleaning procedure is commonly known as a wet cleaning procedure. A wet cleaning procedure can take about one day, and is relatively expensive because of direct costs such as the labor and parts involved, as well as indirect costs such as the fact that the process chamber is not available for revenue-producing production use. Due to the inconvenience and expense involved in a wet cleaning procedure, it is desirable to maximize the time interval between successive wet cleaning procedures. On the other hand, it is critical that this time interval not be too long, or else the process chamber will reach a point where the etching procedure is ineffective and results in defective wafers, as discussed above.
Various existing techniques have been developed to help determine when to initiate wet cleaning of a given process chamber. One such technique is to maintain a record of the number of hours of production use of the particular chamber since it was last subjected to a wet cleaning, and to initiate the next wet cleaning when the cumulative total reaches a specified value, such as 80 to 100 hours of production use. However, in this approach, the number of hours which triggers the initiation of the wet cleaning procedure must be selected to be a xe2x80x9csafexe2x80x9d value which ensures that, even under worst-case chamber conditions, cleaning will occur before defective products are produced. Since actual chamber conditions are usually somewhat better than the worst-case scenario, it means that cleaning is normally triggered somewhat in advance of the time when it optimally should be triggered. This in turn means that this approach for determining when to clean a chamber is less than optimum because, on average, chamber cleaning consistently occurs too often. Stated differently, the average number of cleanings per year is greater than would be the case if cleaning were initiated in response to monitoring of actual process conditions within the chamber, and the greater average number of cleanings per year represents a greater average cost per year with respect to chamber cleaning.
A second technique for determining when to clean a chamber attempts to periodically test the actual process conditions within the chamber. More specifically, a single production type wafer is placed in the chamber and subjected to an etch procedure, and is then removed and cross-sectioned so that one via opening, or possibly several via openings, can be inspected to see if each such opening was etched completely through the particular layer in which it is being formed. However, cross-sectioning and inspecting a wafer is time-consuming, and may completely miss an etch stop problem present on the wafer. This is because etch stop may not occur uniformly across the wafer, and the one or two via openings selected for inspection may be openings other than those that experienced etch stop.
Another technique commonly used in the art is to put a single test wafer in the test chamber and subject it to the etch procedure, but instead of via openings having a critical dimension (CD) or diameter of a production size, it has one or more etch regions with dimensions that are many times larger than the CD of a typical via opening. For example, each such etch region may have an area with a size on the order of 100 microns by 100 microns. Because the etch regions are much larger than an actual via opening, they do not provide a fully accurate picture of whether an etch stop problem may actually be occurring within via openings of production wafers. This is because the actual etching conditions which exist within a via opening of relatively small CD are significantly different from the actual etching conditions which exist for a relatively large test etch surface with an area that has a size on the order of 100 microns by 100 microns. As a consequence, the actual etch conditions within a via opening of relatively small CD cannot be accurately judged on the basis of a relatively large test etch region.
As to both of these techniques which use test wafers, a further disadvantage is that it is common in the art to carry out this type of etch rate qualification on a separate basis for each different production process that is run in the particular process chamber, which is time-consuming and expensive. Moreover, as to a given production process, both of these techniques look only at an effective etch rate for a single wafer etched under a single set of process conditions, which is insufficient information to provide a fully accurate indication of the degree of process drift within the chamber.
Still another existing approach is to upgrade the hardware of a given chamber by adding a second pressure sensor on the side of a baffle plate opposite from the existing pressure sensor, or in other words on the side of the baffle plate nearest the wafer. This permits feedback control based on the actual pressure in the region of the wafer during an etch procedure. However, the hardware upgrade itself is relatively expensive, and in fact typically involves tens of thousands of dollars for each chamber. In addition, the added pressure sensor must be periodically cleaned in order to avoid inaccurate readings. Further, existing test chambers often have a ring of magnets that encircles the wafer and rotates slowly in order to facilitate confinement of the plasma in the chamber. This rotating magnet ring causes fluctuations of the plasma within the chamber, in a manner which results in varying conditions at the extra sensor that effectively add a level of uncertainty or xe2x80x9cnoisexe2x80x9d to the readings from the sensor.
Separately from the issue of determining the condition of a given chamber is the issue of chamber matching. More specifically, an actual production environment will typically involve the provision of a plurality of process chambers that are structurally identical and that can be operated under theoretically identical process conditions, but which in reality have differences in performance even when operated under theoretically identical conditions. Consequently, it is desirable to be able to accurately compare the performance of two or more similar chambers being operated under equivalent conditions, and then have the option of adjusting conditions for one or both chambers so as to reduce or eliminate any detected mismatch in their performance. With reference to the above discussion of the use of production or test wafers to measure an effective test rate, shortcomings of the type discussed above with respect to process drift also limit the usefulness of these techniques with respect to comparison of chamber performance.
In view of the foregoing discussion, it will be recognized that existing techniques for evaluating process drift and for comparing performance of multiple chambers have been generally adequate for their intended purposes, but have not been satisfactory in all respects.
From the foregoing, it may be appreciated that a need has arisen for a method of accurately monitoring process conditions in a process chamber used for semiconductor manufacturing, in a manner which is inexpensive, fast, reliable and accurate.
According to a first form of the present invention, a method is provided to address this need, and involves monitoring a process drift in a process chamber by: successively introducing a plurality of test wafers into the process chamber, and etching each test wafer under a respective set of chamber conditions which are substantially the same except that each set involves use of a respective different gas pressure within the chamber; determining for each test wafer an effective test etch rate thereof; extrapolating from the test etch rates and respective corresponding gas pressures a test curve representing variation of test etch rate relative to gas pressure; and comparing the test curve to a reference curve in order to determine a relative pressure offset therebetween, the pressure offset being representative of a degree of process drift occurring within the chamber.
A different form of the present invention involves matching etch performance in first and second process chambers by: successively introducing a plurality of first test wafers into the first process chamber and etching each of the first test wafers under a respective set of chamber conditions which are substantially the same except that each set involves use of a respective different gas pressure; and successively introducing a plurality of second test wafers into the second process chamber and etching each of the second test wafers under a respective set of chamber conditions which are substantially the same except that each set involves use of a respective different gas pressure. Then, the method involves: determining for each of the first and second test wafers an effective test etch rate thereof; extrapolating from the test etch rates and respective corresponding gas pressures for the first test wafers a first test curve representing variation of test etch rate relative to gas pressure for the first chamber; extrapolating from the test etch rates and respective corresponding gas pressures for the second test wafers a second test curve representing variation of test etch rate relative to gas pressure for the second chamber; and comparing the first test curve to the second test curve in order to determine a relative offset therebetween which represents an operational difference between the first and second chambers.